职位描述
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Job Description:
SSE (Systems Solutions Engineering) works with strategy customers together to
design solutions covering a wide range of network applications and datacenter
acceleration by FPGA. The network applications include traditional network
equipment such as switches, bridges, routers, and datacenter. The datacenter
acceleration applications include FPGA based SmartNIC, which makes FPGA to
accommodate network/storage/AI acceleration. Meanwhile, networking SSE will pay
big attention on telecom NFV application such as vBNG, 5G UPF, vFW, Telemetry.
And other computation intensive offloads by FPGA will be networking SSE design
target.
SSE team in China is seeking an experienced FPGA system UVM validation.
Responsibility:
1. On-time delivery RTL design both on block and system level
2. Participates in the specs definitions of whole system architecture; figure
out system test plan and validation strategy.
3. Build validation platform, generate unit level test cases and testing
environment; run the test cases in common EDA simulation tools; isolate the
design defect and debug the issues
4. Working with system verification engineers to develop test cases on the
whole design and assist on the system verification environment setup
5. Collaborate with sales team to uncover system requirement and promote
solution
Qualifications:
Qualifications:
1. MSEE/BSEE or related field with at least 8 years' experience in FPGA design
and validation
2. Very familiar with FPGA design flow, rich experience including Verilog and
System Verilog coding, UVM validation solution, function verification, hardware
validation and good FPGA debug skill
3. Very familiar with common EDA simulation tools like Questsim/modelsim,
Verdi and VCS
4. Good knowledge of networking application interface definitions including
802.3 Ethernet, PCIe/CXL, external memories such as DDR and QDR RAM
5. Deep dive in network technologies, such as PPP, PPPoE, 802.1q, QinQ, IP
route, MPLS, ARP, VPLS, VxLAN, virtio, TCP/IP, RoceV2, security IPSec/SSL
6. Network application related background like core router, BNG, OVS, RDMA,
TOE, security
7. Fluent verbal and written English
8. Good communication skills and mindset of team work
In Q4 2023, Intel announced Altera will be reported as a separate business
unit beginning on January 1, 2024 with ongoing support from Intel. This
position is associated to that standalone business strategy and is expected to
fully transition to a standalone company at some time in the future
SSE (Systems Solutions Engineering) works with strategy customers together to
design solutions covering a wide range of network applications and datacenter
acceleration by FPGA. The network applications include traditional network
equipment such as switches, bridges, routers, and datacenter. The datacenter
acceleration applications include FPGA based SmartNIC, which makes FPGA to
accommodate network/storage/AI acceleration. Meanwhile, networking SSE will pay
big attention on telecom NFV application such as vBNG, 5G UPF, vFW, Telemetry.
And other computation intensive offloads by FPGA will be networking SSE design
target.
SSE team in China is seeking an experienced FPGA system UVM validation.
Responsibility:
1. On-time delivery RTL design both on block and system level
2. Participates in the specs definitions of whole system architecture; figure
out system test plan and validation strategy.
3. Build validation platform, generate unit level test cases and testing
environment; run the test cases in common EDA simulation tools; isolate the
design defect and debug the issues
4. Working with system verification engineers to develop test cases on the
whole design and assist on the system verification environment setup
5. Collaborate with sales team to uncover system requirement and promote
solution
Qualifications:
Qualifications:
1. MSEE/BSEE or related field with at least 8 years' experience in FPGA design
and validation
2. Very familiar with FPGA design flow, rich experience including Verilog and
System Verilog coding, UVM validation solution, function verification, hardware
validation and good FPGA debug skill
3. Very familiar with common EDA simulation tools like Questsim/modelsim,
Verdi and VCS
4. Good knowledge of networking application interface definitions including
802.3 Ethernet, PCIe/CXL, external memories such as DDR and QDR RAM
5. Deep dive in network technologies, such as PPP, PPPoE, 802.1q, QinQ, IP
route, MPLS, ARP, VPLS, VxLAN, virtio, TCP/IP, RoceV2, security IPSec/SSL
6. Network application related background like core router, BNG, OVS, RDMA,
TOE, security
7. Fluent verbal and written English
8. Good communication skills and mindset of team work
In Q4 2023, Intel announced Altera will be reported as a separate business
unit beginning on January 1, 2024 with ongoing support from Intel. This
position is associated to that standalone business strategy and is expected to
fully transition to a standalone company at some time in the future
工作地点
地址:成都武侯区成都银泰城
查看地图
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职位发布者
Aman..HR
英特尔(中国)有限公司北京分公司
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IT服务·系统集成
-
500-999人
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外商独资·外企办事处
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朝阳区光华路1号嘉里中心601室
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